Commit graph

46 commits

Author SHA1 Message Date
0xrsydn
c31a703db4 feat(memory): protect CPU BIOS reads with retained ARM prefetch
Retain the supplied image PC+8 snapshot after successful ARM BIOS instructions. CPU data reads from outside BIOS use its byte lanes; reads inside BIOS and host inspection remain mapped reads. Keep nominal timing and diagnostic atomicity. Unknown history, Thumb BIOS execution, and missing lookahead remain explicit limits rather than guessed values.

Add original regressions for ARM/Thumb callers, all CPU modes, widths and rotation, synthetic SWI/IRQ returns, original boot provenance, context isolation, history invalidation, and device progress. No Nintendo firmware or opcode constants are used to synthesize results.

Darwin arm64 validation: 861 workspace tests and 792 core/demo tests in debug and release; 39 Python tests; native ROM windows; all ten demo smoke tests; fmt, clippy, rustdoc, and docs links. Public ARM, Thumb, and memory ROMs still pass. The public BIOS ROM still fails firmware-specific test 1, now reading its actual replacement-BIOS prefetch rather than raw vector bytes.
2026-10-05 21:43:10 +07:00
0xrsydn
6e736c634b test(bios): integrate pinned BIOS read-protection baseline
Add --suite bios with hash-verified upstream files and the ARM evaluation checkpoint at 0x08000248. Preserve the r12=0 assertion, original BIOS boot, and all test bytes. Add synthetic adapter and CLI regressions.

On Darwin arm64 the public ROM fails test 1 in debug and release after 64 steps and 543 nominal cycles. Document that this tests protected reads of Nintendo firmware opcodes, not general BIOS service compatibility. Online and offline preparation agree; 39 Python tests pass. Core behavior is unchanged.
2026-10-05 21:31:04 +07:00
0xrsydn
661f00d682 test(memory): integrate pinned public memory compatibility suite
Add --suite memory with verified source hashes, ARM eval checkpoint 0x08000350, and the r12 result assertion. Keep default ARM and explicit Thumb preparation unchanged. Extend offline adapter and CLI tests; retain public binaries outside tracked files.

The unmodified memory ROM passes in debug and release after 174 steps and 1478 nominal cycles, without changing core behavior. Document weak byte-write assertions and mode-selection caveats. Add original CPU-driven tests with exact sentinels, mode/mirror boundaries, byte lanes, forced blank, readback, and nominal device timing.

Validated on Darwin arm64: 851 workspace tests in debug and release; 782 core/demo tests separately; 30 Python tests; all three pinned public suites in both profiles; native ROM windows; all ten demo smoke tests; fmt, clippy, rustdoc, and local documentation links.
2026-10-05 21:19:32 +07:00
0xrsydn
3d67b136ba fix(cpu): store PC plus six for Thumb empty register lists
Correct the shared Thumb block-store PC offset from four to six bytes. Retain ARM PC+12, 64-byte empty-list writeback, normal load behavior, alignment, flags, and nominal timing. Correct prior internal expectations and add original regressions for bases, banks, alignment, ROM windows, writeback, clocks, and atomic errors.

The pinned public Thumb ROM now passes its unchanged ARM-state r7 checkpoint after 807 steps and 4170 nominal cycles. The pinned ARM ROM still passes. Neither external ROM nor result assertion is modified.

Validated on Darwin arm64: 848 workspace tests in debug and release; 779 core/demo tests separately; 21 Python adapter tests; both public suites in both profiles; native ROM-window tests; all ten demo window smoke tests; fmt, clippy, rustdoc, and local documentation links.
2026-10-05 20:47:39 +07:00
0xrsydn
08c8705904 test(cpu): integrate pinned public Thumb compatibility suite
Add --suite thumb while retaining default ARM preparation. Verify hashes, the Thumb-to-ARM evaluation bridge, and the result checkpoint; retain upstream provenance outside tracked files. Expand offline synthetic adapter and CLI regressions.

Darwin arm64 baseline: the unmodified Thumb ROM reaches ARM eval at 0x08000934 after 771 steps with r7=229 in debug and release. ARM remains passing. Online/offline preparation agrees and all 21 Python tests pass. CPU behavior is unchanged.
2026-10-05 20:40:37 +07:00
0xrsydn
a9493d4cc6 feat(memory): support ARM unused-memory open-bus reads
Snapshot mapped PC+8 bytes for ARM data reads in the documented unused ranges. Preserve strict host/fetch/Thumb/DMA diagnostics, missing-ROM errors, existing write rules, and nominal timing. Add original regressions and document the bounded model.

The unmodified pinned jsmolka ARM ROM now reaches its verified checkpoint with r12=0 in debug and release: 1344 steps and 11257 nominal cycles. No ROM, manifest, or assertion changes.

Validated on Darwin arm64: 842 workspace tests in debug and release; 773 core/demo tests separately; Python adapter tests; native ROM windows; all ten demo window smoke tests; fmt, clippy, and rustdoc.
2026-10-05 20:29:17 +07:00
0xrsydn
ab625dc55d fix(cpu): support single-load writeback register aliases
Allow ARM LDR/LDRB/LDRH/LDRSB/LDRSH to share non-PC base and destination registers with writeback. Keep the loaded value after computing addresses from incoming operands. Preserve PC restrictions, unsupported user transfers, store behavior, and atomic memory diagnostics.

Add original regressions for index modes, offsets, widths, alignment, sign extension, all active banks, timing, I/O/IRQ ordering, and failures. The unchanged pinned public ARM ROM progresses past tests 360 and 361, then fails at test 362 on an unmapped 0x80000000 read; no full-suite pass is claimed.

Verified on Darwin arm64: debug/release workspace and core suites, Python adapter tests, Clippy, rustdoc, native ROM-window checks, and all ten demo smoke tests. Document the new behavior and next memory-access blocker.
2026-10-05 20:15:53 +07:00
0xrsydn
a28b830b38 feat(testing): pin public ARM fixture and document compatibility baseline
Add a standard-library Python adapter and SHA-256/size lock for jsmolka/gba-tests ARM at a7113b67e63f83a9b321696ddd7042ccfad6c881. Retain sources and license locally, refuse tracked output paths or overwrites, verify offline inputs, and generate the source-verified eval/r12 suite checkpoint without patching the ROM.

Add Python to the pinned Nix shell, offline adapter regressions, and public-test provenance/results documentation. Verified on Darwin arm64: Rust debug/release workspace tests, adapter tests, Clippy, rustdoc, native ROM and all demo window checks. The public test remains a failing baseline at instruction 0xe5b00004, PC 0x0800132c, in test 360.
2026-10-05 20:01:08 +07:00
0xrsydn
75fb98bc55 fix(cpu): restore saved status for test and compare Rd=15 forms
Restore CPSR from SPSR for ARM TST/TEQ/CMP/CMN with unused Rd=15 when the current mode has an SPSR. Preserve sequential PC and nominal timing; use normal ALU flags in User/System. Keep ordinary result-writing PC return validation unchanged.

Reproduced independent jsmolka/gba-tests ARM failure 234 before this fix. Original regressions cover flags, masks, bank restoration, operand forms, conditions, timing, and atomic errors. The public ROM progresses to a separate unsupported load/writeback alias at test 360; no full public-suite pass is claimed.
2026-10-05 20:01:08 +07:00
0xrsydn
da700671ad feat(testing): add bounded headless ROM suites and JSON reports
Read strict versioned suite manifests with independent ROM cases, explicit ARM/Thumb checkpoints, register/CPSR/memory assertions, and aggregate step limits. Report every case deterministically and fail on timeouts, STOP, diagnostics, missing files, or mismatches. Keep host JSON dependencies outside the core.

Add an original ARM/Thumb/BIOS suite generator, unit and process-level regressions, and schema/usage documentation. Verified on Darwin arm64 with debug/release workspace and core suites, Clippy, rustdoc, native ROM-window tests, all ten demo smoke tests, repeatable release reports, and a deliberate assertion failure. Independent public hardware-test ROM validation remains next.
2026-10-05 19:41:40 +07:00
0xrsydn
109c1ffe81 feat(desktop): run ROM files in a window with keypad input
Add --rom PATH --window with optional bounded --frames execution. Capture from BIOS boot, pump native events between bounded machine slices, retain frames during STOP, and sample keypad input for wake-up. Share final machine reports with terminal mode.

Add an original file-exportable input ROM, controller and CLI regressions, and opt-in native window tests. Document controls, frame limits, STOP behavior, and compatibility limits. Verified on Darwin arm64: debug/release workspace and core tests, Clippy, rustdoc, native ROM diagnostics, all ten demo smoke tests, and a 60-frame release ROM run.
2026-10-05 19:22:13 +07:00
0xrsydn
c256bf8ccd feat(cartridge): add bounded terminal ROM loading
Load read-only raw ROM files with bounded size checks and original BIOS boot. Require a machine-step budget and report CPU state, STOP, and explicit diagnostics without opening a window. Keep file access in the desktop crate.

Cover argument parsing, Darwin paths, file boundaries, ARM/Thumb execution, DMA/IRQ budgets, HALT/STOP, and error reports. Document limits and usage. Verified on native Darwin arm64: debug/release workspace tests, core-only tests, Clippy, rustdoc, all ten window smoke tests, and a release raw-ROM run.
2026-10-05 18:57:58 +07:00
0xrsydn
c836944c2e feat(power): implement keypad-wake STOP and BIOS Stop service
Separate Running, Halt, and Stop states. Complete the entering instruction before freezing CPU, DMA, timers, display, and externally supplied clock advances. Wake STOP through the live enabled keypad condition without creating a clock-off IF request.

Implement original ARM SWI 0x03, preserve caller state, and expose zero-cycle StopIdle plus stopped frame-runner results. Retain DMA state, timer phase, and captured frames across sleep. Document keypad-only wake and unverified oscillator/edge timing.

Add core, BIOS, and demo regression tests; preserve BIOS-only access and failed-store isolation. Validated on Darwin arm64 with debug/release workspace and core/demo suites, Clippy, rustdoc, ten native window smoke tests, and terminal demos.
2026-10-05 18:28:23 +07:00
0xrsydn
597b02881b feat(input): implement KEYCNT keypad interrupt control
Add a dependency-free keypad state machine in gba-core, map KEYCNT, latch IF bit 12, and wake HALT through the existing interrupt gates. Sample complete CPU/DMA control writes once so transient byte values cannot create false requests.

Document the mGBA-style polling policy and its unverified hardware retrigger limits. Cover every button-state/selection pair, register masks, repeated requests, byte/word writes, failed-store isolation, DMA priority, ARM/Thumb IRQ return, BIOS IntrWait, and retained BIOS reset state.

Follow the restructured workspace and modular documentation. Validated on Darwin arm64: workspace and core/demo tests pass in debug and release, with Clippy, rustdoc, ten native window smoke tests, and terminal demos passing.
2026-10-05 18:05:26 +07:00
0xrsydn
7d396fea35 docs: split README into docs/ and add AGENTS.md
Move the README's hardware notes, demo controls, environment setup, test
notes, file map, and references into docs/ and docs/hardware/. The README
is now an overview with a docs index. AGENTS.md gives coding agents a short
map of crates, commands, and where to read and write documentation.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 16:20:18 +07:00
0xrsydn
f8a0676748 refactor: split into gameboy-rust workspace with core, demos, and desktop crates
Move the emulator into crates/gba-core, the original demo programs into
crates/gba-demos, and the minifb frontend into crates/desktop. The binary
is now gameboy-rust. Imports change from gba_rust to gba_core/gba_demos;
no behavior changes.

gba-core has no dependencies. Its integration tests use gba-demos as a
development dependency.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 16:09:46 +07:00
0xrsydn
a8944d1d5f feat(bios): implement selective RegisterRamReset service
Execute SWI 0x01 through original ARM code. Clear selected work RAM, palette RAM, VRAM, and OAM; force blank; reset supported display, DMA, timer, and interrupt registers through normal bus writes. Preserve caller state and excluded BIOS work RAM apart from the common SWI frame.

Reject serial/sound reset flags before display or reset writes. Document the supported subset, timer counter behavior, DMA ordering, and RAM caller hazards. Add fifteen tests covering memory flags and boundaries, I/O defaults, rendering, register preservation, hidden device latches, diagnostics, and device progress.

Validated on Darwin arm64: 720 default and 709 core-only tests in debug and release; formatting, Clippy, rustdoc, ten native window smoke tests, and CPU/timer demos pass.
2026-10-05 15:54:07 +07:00
0xrsydn
2dfab137a6 feat(bios): implement SoftReset restart service
Execute SWI 0x00 through original ARM code. Read the restart flag before clearing 512 bytes of BIOS work RAM, reset System/SVC/IRQ stacks and specified registers, then branch to ROM or EWRAM in ARM System mode.

Keep device state and clocks active, preserve unrelated CPU banks, and document the deterministic IRQ-masked restart status. Add eleven tests for every flag byte, ARM/Thumb and User/System callers, exact memory bounds, bank state, restart execution, DMA/timers, and unsupported exception callers.

Validated on Darwin arm64: 705 default and 694 core-only tests in debug and release; formatting, Clippy, rustdoc, ten native window smoke tests, and CPU/timer demos pass.
2026-10-05 15:36:07 +07:00
0xrsydn
f60db7e43b feat(bios): implement background and object affine services
Execute BgAffineSet and ObjAffineSet through original ARM routines with a mathematically generated sine table. Preserve caller state, validate record spans and strides, and use normal bus writes for background registers and sprite matrices.

Add independent matrix/origin references, all-phase coverage, rendering integration, diagnostics, stack and DMA checks. Extend image construction with multiple literal pools and reserved table bounds. Document formats and compatibility limits.

Validated on Darwin arm64: 694 default and 683 core-only tests in debug and release; formatting, Clippy, rustdoc, ten native window smoke tests, and CPU/timer demos pass.
2026-10-05 15:22:54 +07:00
0xrsydn
1edaa4151d feat(bios): implement fixed-point ArcTan and ArcTan2 services
Add SWI 0x09 and 0x0a as original ARM routines. Evaluate the fixed-point angle polynomial with wrapped products, reduce ArcTan2 ratios with integer division, and handle axes and quadrants. Require sign-extended 16-bit inputs and preserve non-result caller registers.

Add 15 regression tests for fixed-point and floating-point references, signed limits, rounding, quadrant boundaries, caller flags, stack bounds, repeated calls, and DMA/IRQ progress. Validate 671 default and 660 core-only tests in debug and release, plus all 10 native Darwin ARM64 window smoke tests.
2026-10-05 14:37:08 +07:00
0xrsydn
f0e5240d44 feat(bios): decode Huffman streams through ARM instructions
Implement SWI 0x13 for 4-bit and 8-bit symbols. Traverse forward-offset trees using MSB-first input words and pack symbols into complete output words. Validate visited edges, leaf widths, alignment, output lengths, and address bounds.

Add 21 regression tests with independent tree serialization and path encoding, deep/max-size trees, word-boundary refills, malformed input, partial failures, caller state, and DMA/IRQ progress. Validate 656 default and 645 core-only tests in debug and release, plus all 10 native Darwin ARM64 window smoke tests.
2026-10-05 14:18:18 +07:00
0xrsydn
3ebc1f03d0 feat(bios): implement byte and halfword differential filters
Add SWI 0x16, 0x17, and 0x18 as original ARM routines. Reconstruct samples with modular addition and byte or halfword output. Validate headers, alignment, lengths, and address ranges; preserve earlier completed writes on failure.

Add 17 regression tests for sample round trips, wraparound, large byte lengths, caller state, partial failures, bus behavior, and DMA/IRQ progress. Validate 635 default and 624 core-only tests in debug and release, plus all 10 native Darwin ARM64 window smoke tests.
2026-10-05 13:14:00 +07:00
0xrsydn
612a978f44 docs: document emulator architecture validation and limits
Document the complete integrated implementation and native Darwin validation. This ordered initial import groups existing code by subsystem; earlier chunks can depend on later integration commits.
2026-10-05 12:58:40 +07:00
0xrsydn
f9a426a11e feat(desktop): integrate native macOS windows controls and smoke tests
Expose core modules and original demo images. Add CLI modes, native windows, scripted smoke tests, and the pinned minifb focus workaround.
2026-10-05 12:58:40 +07:00
0xrsydn
189240d9b4 feat(demo): exercise timer setup and IRQ handlers 2026-10-05 12:58:40 +07:00
0xrsydn
0b3935800a feat(demo): exercise HBlank DMA palette changes 2026-10-05 12:58:40 +07:00
0xrsydn
c6a447d554 feat(demo): exercise background and sprite mosaic controls 2026-10-05 12:58:40 +07:00
0xrsydn
bb409f27b1 feat(demo): exercise windows blending and brightness 2026-10-05 12:58:40 +07:00
0xrsydn
52194cd38b feat(demo): exercise Mode 4 and 5 page switching 2026-10-05 12:58:39 +07:00
0xrsydn
cf9ee0ca65 feat(demo): exercise affine transforms and raster distortion 2026-10-05 12:58:39 +07:00
0xrsydn
169fab9bf6 feat(demo): run CPU-driven bitmap tile and sprite scenes
Add original ARM graphics programs, input controls, DMA initialization, and a bounded frame runner.
2026-10-05 12:58:39 +07:00
0xrsydn
0280563430 feat(bios): expand packed units with BitUnPack
Add SWI 0x10, packed-unit widths, conditional offsets, complete word stores, and independent bit-level tests.
2026-10-05 12:58:39 +07:00
0xrsydn
5984551784 feat(bios): decode run-length streams through ARM instructions
Add RLUnCompWram and RLUnCompVram with block bounds, word-independent buffering, and device-progress tests.
2026-10-05 12:58:39 +07:00
0xrsydn
17e9351371 feat(bios): decode LZ77 streams through ARM instructions
Add byte and buffered-halfword output, overlapping references, argument diagnostics, and a reusable output routine.
2026-10-05 12:58:39 +07:00
0xrsydn
096bcfe314 feat(bios): implement division and integer square root
Add Div, DivArm, and Sqrt with emitted ARM algorithms and independent arithmetic references.
2026-10-05 12:58:39 +07:00
0xrsydn
04e4599677 feat(bios): add original boot IRQ waits and memory services
Generate original ARM firmware for minimal boot, IRQ callbacks, HALT, IntrWait, CpuSet, and CpuFastSet.
2026-10-05 12:58:39 +07:00
0xrsydn
bfab05b34d feat(video): bound per-row sprite preparation work
Apply nominal 1210/954-cycle allowances, affine setup costs, OAM-order allocation, and partial sprite prefixes.
2026-10-05 12:58:38 +07:00
0xrsydn
52c77193cb feat(video): capture scanlines and prepare sprites one row ahead
Add cycle40 preparation, deferred diagnostics, HBlank capture, VBlank presentation, and affine history tests.
2026-10-05 12:58:38 +07:00
0xrsydn
1cba1510d0 feat(video): render regular and affine sprites
Add OAM sampling, affine canvases, tile mapping, priority metadata, OBJ windows, and mosaic composition.
2026-10-05 12:58:38 +07:00
0xrsydn
45b45e5c52 feat(video): track background and sprite mosaic state
Add vertical mosaic counters and background/sprite sampling regressions.
2026-10-05 12:58:38 +07:00
0xrsydn
9d14dd7cf4 feat(video): track windows and compose color effects
Add persistent window comparators, region masks, alpha blending, and brightness effects.
2026-10-05 12:58:38 +07:00
0xrsydn
fad034ae74 feat(video): render tiled affine and bitmap backgrounds
Add Mode 0-5 composition, palettes, tile maps, affine sampling, and framebuffer diagnostics.
2026-10-05 12:58:38 +07:00
0xrsydn
bb6784615a feat(machine): schedule display DMA IRQs and HALT
Integrate nominal bus timing, device clocks, display events, DMA transfers, keypad state, and interrupt delivery.
2026-10-05 12:58:38 +07:00
0xrsydn
156f1eb839 feat(memory): map GBA memory and device registers
Add memory mirrors, video-bus write rules, I/O latches, timers, and interrupt registers.
2026-10-05 12:58:38 +07:00
0xrsydn
535c69e09f feat(cpu): implement ARM7TDMI ARM and Thumb execution
Add ALU, transfers, banked status, exceptions, instruction timing, and CPU regression tests.
2026-10-05 12:58:38 +07:00
0xrsydn
85bc2de6e7 chore(dev): bootstrap Rust and Nix environments for Darwin
Configure direnv, native Darwin compiler flags, and pinned desktop dependencies. Exclude build outputs, local environments, ROMs, and saves.

Start an ordered import of existing work. Feature chunks share dependencies; validate the integrated stack, not each intermediate import.
2026-10-05 12:58:37 +07:00