c836944c2e
Separate Running, Halt, and Stop states. Complete the entering instruction before freezing CPU, DMA, timers, display, and externally supplied clock advances. Wake STOP through the live enabled keypad condition without creating a clock-off IF request. Implement original ARM SWI 0x03, preserve caller state, and expose zero-cycle StopIdle plus stopped frame-runner results. Retain DMA state, timer phase, and captured frames across sleep. Document keypad-only wake and unverified oscillator/edge timing. Add core, BIOS, and demo regression tests; preserve BIOS-only access and failed-store isolation. Validated on Darwin arm64 with debug/release workspace and core/demo suites, Clippy, rustdoc, ten native window smoke tests, and terminal demos.
673 lines
23 KiB
Rust
673 lines
23 KiB
Rust
use gba_core::{
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bios::{self, IRQ_FLAGS, IRQ_HANDLER, SYSTEM_STACK, UNSUPPORTED_TRAP},
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cpu::{CpuError, InstructionSet, Mode},
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display::VBLANK_START,
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io::{DISPSTAT, IE, IF, IME, POSTFLG, TIMER_BASE},
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machine::{Machine, MachineError, StepKind},
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memory::{Memory, MemoryError, BIOS_SIZE, ROM_START, VRAM_START},
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};
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const SOURCE: u32 = 0x0200_0000;
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const DEST: u32 = 0x0201_0000;
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const CALLBACK: u32 = 0x0300_0100;
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const ROM_DATA: u32 = ROM_START + 13 * 4;
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#[path = "bios/affine.rs"]
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mod affine;
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#[path = "bios/angles.rs"]
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mod angles;
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#[path = "bios/arithmetic.rs"]
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mod arithmetic;
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#[path = "bios/bit_unpack.rs"]
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mod bit_unpack;
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#[path = "bios/differential.rs"]
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mod differential;
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#[path = "bios/huffman.rs"]
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mod huffman;
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#[path = "bios/lz77.rs"]
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mod lz77;
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#[path = "bios/ram_reset.rs"]
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mod ram_reset;
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#[path = "bios/reset.rs"]
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mod reset;
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#[path = "bios/run_length.rs"]
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mod run_length;
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#[path = "bios/stop.rs"]
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mod stop;
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fn words(code: &[u32]) -> Vec<u8> {
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code.iter().flat_map(|word| word.to_le_bytes()).collect()
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}
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fn reach(machine: &mut Machine, pc: u32, max_steps: usize) {
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for _ in 0..max_steps {
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if machine.cpu().pc() == pc {
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return;
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}
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machine.step().unwrap();
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}
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panic!(
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"did not reach {pc:#x}; pc={:#x}, cpsr={:#x}",
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machine.cpu().pc(),
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machine.cpu().cpsr()
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);
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}
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/// Boot, load operands and status through CPU instructions, then stop just before SWI.
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fn call(service: u8, thumb: bool, operands: [u32; 3]) -> (Machine, u32) {
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call_status(service, thumb, operands, 0x1f)
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}
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fn call_status(service: u8, thumb: bool, operands: [u32; 3], status: u32) -> (Machine, u32) {
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call_status_data(service, thumb, operands, status, &[])
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}
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fn call_status_data(
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service: u8,
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thumb: bool,
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operands: [u32; 3],
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status: u32,
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data: &[u8],
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) -> (Machine, u32) {
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let mut code = [
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0xe59f_0020, // LDR r0,[pc,#32] (offset 40)
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0xe59f_1020,
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0xe59f_2020,
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0xe3a0_30a3, // MOV r3,#0xa3
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0xe3a0_c05c, // MOV r12,#0x5c
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0xe328_f480, // MSR CPSR_f,#0x80000000
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if thumb { 0xe28f_e001 } else { 0xe1a0_e00f }, // ADD lr,pc,#1 / MOV lr,pc
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if thumb { 0xe12f_ff1e } else { 0xe1a0_0000 }, // BX lr / NOP
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if thumb {
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0xe7fe_0000 | 0xdf00 | u32::from(service)
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} else {
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0xef00_0000 | u32::from(service) << 16
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},
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0xeaff_fffe,
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operands[0],
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operands[1],
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operands[2],
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];
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if status != 0x1f {
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code[3] = 0xe321_f000 | status;
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} // MSR CPSR_c,#status
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let mut rom = words(&code);
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assert_eq!(rom.len() as u32, ROM_DATA - ROM_START);
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rom.extend_from_slice(data);
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let mut machine = bios::boot(rom).unwrap();
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reach(&mut machine, ROM_START + 32, 100);
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assert_eq!(
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machine.cpu().instruction_set(),
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if thumb {
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InstructionSet::Thumb
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} else {
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InstructionSet::Arm
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}
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);
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(machine, ROM_START + if thumb { 34 } else { 36 })
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}
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fn finish(machine: &mut Machine, return_pc: u32) {
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machine.step().unwrap(); // Execute SWI, not a host service call.
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reach(machine, return_pc, 100_000);
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}
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/// Original ARM callback: acknowledge IF, record BIOS flags, then return to dispatcher.
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fn callback(bus: &mut Memory) {
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let code = [
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0xe280_0c02, // ADD r0,r0,#0x200 (r0=I/O base from dispatcher)
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0xe1d0_10b2, // LDRH r1,[r0,#2]
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0xe1c0_10b2, // STRH r1,[r0,#2]
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0xe3a0_0403, // MOV r0,#0x03000000
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0xe280_0c7f, // ADD r0,r0,#0x7f00
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0xe1d0_2fb8, // LDRH r2,[r0,#0xf8]
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0xe182_2001, // ORR r2,r2,r1
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0xe1c0_2fb8, // STRH r2,[r0,#0xf8]
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0xe12f_ff1e, // BX lr
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];
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for (index, instruction) in code.into_iter().enumerate() {
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bus.write32(CALLBACK + index as u32 * 4, instruction)
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.unwrap();
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}
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bus.write32(IRQ_HANDLER, CALLBACK).unwrap();
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}
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#[test]
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fn original_image_is_deterministic_and_boot_enters_arm_system_mode() {
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assert_eq!(bios::image().len(), BIOS_SIZE);
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assert_eq!(bios::image(), bios::image());
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let mut machine = bios::boot(words(&[0xeaff_fffe])).unwrap();
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assert_eq!(machine.cpu().mode(), Mode::Supervisor);
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assert_eq!(machine.cpu().pc(), 0);
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reach(&mut machine, ROM_START, 100);
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assert_eq!(machine.cpu().mode(), Mode::System);
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assert_eq!(machine.cpu().instruction_set(), InstructionSet::Arm);
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assert_eq!(machine.cpu().cpsr(), 0x1f);
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assert_eq!(machine.cpu().registers()[13], SYSTEM_STACK);
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assert_eq!(machine.memory().read8(POSTFLG).unwrap(), 1);
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assert_eq!(machine.memory().read32(IRQ_FLAGS).unwrap(), 0);
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assert_eq!(machine.memory().read32(IRQ_HANDLER).unwrap(), 0);
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assert!(machine.cycles() > 0);
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}
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#[test]
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fn cpu_set_copies_both_widths_from_arm_and_thumb_and_preserves_caller() {
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for thumb in [false, true] {
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for word in [false, true] {
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let (mut machine, return_pc) = call(
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0x0b,
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thumb,
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[SOURCE, DEST, 4 | if word { 1 << 26 } else { 0 }],
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);
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for index in 0..4 {
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machine
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.memory_mut()
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.write32(SOURCE + index * 4, 0x1234_5678 + index)
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.unwrap();
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}
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let before = machine.cpu().clone();
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finish(&mut machine, return_pc);
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assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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for offset in 0..if word { 16 } else { 8 } {
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assert_eq!(
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machine.memory().read8(DEST + offset).unwrap(),
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machine.memory().read8(SOURCE + offset).unwrap()
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);
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}
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}
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}
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}
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#[test]
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fn intr_wait_consumes_preexisting_selected_flags_without_sleep() {
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for thumb in [false, true] {
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let (mut machine, return_pc) = call(4, thumb, [0, 0x10, 0x1234]);
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machine.memory_mut().write16(IRQ_FLAGS, 0x19).unwrap();
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let before = machine.cpu().clone();
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machine.step().unwrap();
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for _ in 0..100 {
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if machine.cpu().pc() == return_pc {
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break;
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}
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assert_ne!(machine.step().unwrap(), StepKind::HaltIdle);
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}
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assert_eq!(machine.cpu().pc(), return_pc);
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assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 9);
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assert_eq!(machine.memory().read16(IME).unwrap(), 1);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
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}
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}
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#[test]
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fn vblank_wait_halts_dispatches_irq_and_returns_through_original_code() {
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let (mut machine, return_pc) = call(5, false, [0x123, 0x456, 0x789]);
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callback(machine.memory_mut());
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machine.memory_mut().write16(DISPSTAT, 8).unwrap();
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machine.memory_mut().write16(IE, 1).unwrap();
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let before = machine.cpu().clone();
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machine.step().unwrap();
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let mut slept = false;
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let mut irq = 0;
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for _ in 0..1000 {
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if machine.cpu().pc() == return_pc {
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break;
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}
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match machine.step().unwrap() {
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StepKind::HaltIdle => slept = true,
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StepKind::IrqEntry => irq += 1,
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_ => {}
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}
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}
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assert!(slept);
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assert_eq!(irq, 1);
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assert_eq!(machine.cpu().pc(), return_pc);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
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assert_eq!(machine.memory().read16(IF).unwrap(), 0);
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assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 0);
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assert_eq!(machine.memory().read16(IME).unwrap(), 1);
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assert!(machine.cycles() > u64::from(VBLANK_START));
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}
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#[test]
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fn unsupported_services_fail_at_an_explicit_instruction_trap() {
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for service in [0x0d, 0x19, 0xff] {
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let (mut machine, _) = call(service, false, [0, 0, 0]);
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let error = (0..100)
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.find_map(|_| machine.step().err())
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.expect("unsupported SWI must fail");
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assert!(matches!(
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error,
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MachineError::Cpu(CpuError::UnsupportedInstruction {
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instruction: UNSUPPORTED_TRAP,
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..
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})
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));
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}
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}
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#[test]
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fn cpu_set_fill_reads_one_value_and_writes_exact_count() {
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for thumb in [false, true] {
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for word in [false, true] {
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let control = 3 | (1 << 24) | if word { 1 << 26 } else { 0 };
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let (mut machine, return_pc) = call(0x0b, thumb, [SOURCE, DEST, control]);
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machine.memory_mut().write32(SOURCE, 0xaabb_ccdd).unwrap();
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for offset in 0..5 {
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machine
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.memory_mut()
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.write32(DEST + offset * 4, 0x9999_9999)
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.unwrap();
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}
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finish(&mut machine, return_pc);
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let bytes = if word { 12 } else { 6 };
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for offset in 0..bytes {
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assert_eq!(
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machine.memory().read8(DEST + offset).unwrap(),
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[0xdd, 0xcc, 0xbb, 0xaa][(offset % if word { 4 } else { 2 }) as usize]
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);
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}
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assert_eq!(machine.memory().read16(DEST + bytes).unwrap(), 0x9999);
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}
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}
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}
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#[test]
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fn cpu_fast_set_rounds_up_to_eight_words_for_copy_and_fill() {
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for thumb in [false, true] {
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for fill in [false, true] {
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for count in [1_u32, 7, 8, 9, 15, 16, 17] {
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let (mut machine, return_pc) = call(
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0x0c,
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thumb,
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[SOURCE, DEST, count | if fill { 1 << 24 } else { 0 }],
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);
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let rounded = (count + 7) & !7;
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for index in 0..rounded + 1 {
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machine
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.memory_mut()
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.write32(SOURCE + index * 4, 0x1000 + index)
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.unwrap();
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machine
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.memory_mut()
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.write32(DEST + index * 4, 0xcccc_cccc)
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.unwrap();
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}
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let before = machine.cpu().clone();
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finish(&mut machine, return_pc);
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for index in 0..rounded {
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assert_eq!(
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machine.memory().read32(DEST + index * 4).unwrap(),
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0x1000 + if fill { 0 } else { index }
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);
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}
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assert_eq!(
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machine.memory().read32(DEST + rounded * 4).unwrap(),
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0xcccc_cccc
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);
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assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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}
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}
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}
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}
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#[test]
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fn fast_copy_reads_each_eight_word_block_before_writing_it() {
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let (mut machine, return_pc) = call(0x0c, false, [SOURCE, SOURCE + 4, 16]);
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let mut expected: Vec<u32> = (0..17).map(|index| 0x1234 + index).collect();
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for (index, value) in expected.iter().enumerate() {
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machine
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.memory_mut()
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.write32(SOURCE + index as u32 * 4, *value)
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.unwrap();
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}
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for start in [0, 8] {
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let block = expected[start..start + 8].to_vec();
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expected[start + 1..start + 9].copy_from_slice(&block);
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}
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finish(&mut machine, return_pc);
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for (index, value) in expected.into_iter().enumerate() {
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assert_eq!(
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machine.memory().read32(SOURCE + index as u32 * 4).unwrap(),
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value
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);
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}
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}
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#[test]
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fn swi_callers_outside_user_and_system_modes_are_rejected() {
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for mode in [0x11, 0x12, 0x13, 0x17, 0x1b] {
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let (mut machine, _) = call_status(0x0b, false, [SOURCE, DEST, 0], mode);
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let error = (0..100).find_map(|_| machine.step().err()).unwrap();
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assert!(matches!(
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error,
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MachineError::Cpu(CpuError::UnsupportedInstruction {
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instruction: UNSUPPORTED_TRAP,
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..
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})
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));
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}
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}
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#[test]
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fn zero_length_copies_do_not_read_source_or_write_destination() {
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for service in [0x0b, 0x0c] {
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for control in [0, 1 << 24, 1 << 26, (1 << 24) | (1 << 26), 0xfae0_0000] {
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let (mut machine, return_pc) =
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call(service, false, [0x0e00_0000, 0x0e00_0000, control]);
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finish(&mut machine, return_pc); // Both addresses would fail if accessed.
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}
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}
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}
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#[test]
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fn copy_count_ignores_reserved_bits_and_fast_set_always_uses_words() {
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for service in [0x0b, 0x0c] {
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let (mut machine, return_pc) = call(service, false, [SOURCE, DEST, 1 | 0xfae0_0000]);
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machine.memory_mut().write32(SOURCE, 0x1234_abcd).unwrap();
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finish(&mut machine, return_pc);
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assert_eq!(
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machine.memory().read32(DEST).unwrap(),
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if service == 0x0b { 0xabcd } else { 0x1234_abcd }
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);
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}
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}
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#[test]
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fn copying_to_video_ram_uses_halfword_and_word_bus_writes() {
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for service in [0x0b, 0x0c] {
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let (mut machine, return_pc) = call(service, false, [SOURCE, VRAM_START, 3]);
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machine.memory_mut().write32(SOURCE, 0x03e0_001f).unwrap();
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machine
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.memory_mut()
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.write32(SOURCE + 4, 0x7fff_7c00)
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.unwrap();
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finish(&mut machine, return_pc);
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assert_eq!(machine.memory().read32(VRAM_START).unwrap(), 0x03e0_001f);
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assert_eq!(machine.memory().read16(VRAM_START + 4).unwrap(), 0x7c00);
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assert_eq!(
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machine.memory().read16(VRAM_START + 6).unwrap(),
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if service == 0x0b { 0 } else { 0x7fff }
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);
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}
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}
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#[test]
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fn copy_addresses_align_down_and_overlaps_use_instruction_order() {
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for word in [false, true] {
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let (mut machine, return_pc) = call(
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0x0b,
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false,
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[SOURCE + 3, DEST + 3, 1 | if word { 1 << 26 } else { 0 }],
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);
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machine.memory_mut().write32(SOURCE, 0x1234_abcd).unwrap();
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finish(&mut machine, return_pc);
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assert_eq!(
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machine.memory().read32(DEST).unwrap(),
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if word { 0x1234_abcd } else { 0x1234_0000 }
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);
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}
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let (mut machine, return_pc) = call(0x0b, false, [SOURCE, SOURCE + 2, 4]);
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machine.memory_mut().write32(SOURCE, 0xabcd_1234).unwrap();
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finish(&mut machine, return_pc);
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for offset in [0, 2, 4, 6, 8] {
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assert_eq!(machine.memory().read16(SOURCE + offset).unwrap(), 0x1234);
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}
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}
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#[test]
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fn protected_or_wrapping_source_ranges_return_without_copying() {
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for service in [0x0b, 0x0c] {
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for source in [0, 0x3ffc, 0x0100_0000, 0x01ff_fffc, 0xffff_fffc] {
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let (mut machine, return_pc) = call(service, false, [source, DEST, 2 | (1 << 26)]);
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machine.memory_mut().write32(DEST, 0x1234_5678).unwrap();
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finish(&mut machine, return_pc);
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assert_eq!(machine.memory().read32(DEST).unwrap(), 0x1234_5678);
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}
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}
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}
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#[test]
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fn copy_failure_keeps_earlier_writes_but_not_partial_instruction_changes() {
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let (mut machine, _) = call(0x0b, false, [SOURCE, 0x07ff_fffc, 2 | (1 << 26)]);
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machine.memory_mut().write32(SOURCE, 0xaabb_ccdd).unwrap();
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let mut failed = false;
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for _ in 0..100 {
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let before = machine.cpu().clone();
|
|
let timing = machine.last_timing();
|
|
let cycles = machine.cycles();
|
|
if let Err(error) = machine.step() {
|
|
assert_eq!(
|
|
error,
|
|
MachineError::Cpu(MemoryError::ReadOnly(0x0800_0000).into())
|
|
);
|
|
assert_eq!(machine.cpu(), &before);
|
|
assert_eq!(machine.cycles(), cycles);
|
|
assert_eq!(machine.last_timing(), timing);
|
|
assert_eq!(machine.memory().read32(0x07ff_fffc).unwrap(), 0xaabb_ccdd);
|
|
failed = true;
|
|
break;
|
|
}
|
|
}
|
|
assert!(failed);
|
|
}
|
|
|
|
#[test]
|
|
fn halt_preserves_registers_and_ime_for_arm_and_thumb_callers() {
|
|
for thumb in [false, true] {
|
|
let (mut machine, return_pc) = call(2, thumb, [0x1234, 0x5678, 0x9abc]);
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
machine
|
|
.memory_mut()
|
|
.write32(TIMER_BASE, 0x00c0_fc18)
|
|
.unwrap(); // IRQ after 1,000 cycles.
|
|
let before = machine.cpu().clone();
|
|
machine.step().unwrap();
|
|
let mut slept = false;
|
|
for _ in 0..200 {
|
|
if machine.cpu().pc() == return_pc {
|
|
break;
|
|
}
|
|
slept |= machine.step().unwrap() == StepKind::HaltIdle;
|
|
}
|
|
assert!(slept);
|
|
assert_eq!(machine.cpu().pc(), return_pc);
|
|
assert_eq!(machine.memory().read16(IME).unwrap(), 0);
|
|
assert_eq!(machine.memory().read16(IF).unwrap(), 8);
|
|
assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
|
|
assert_eq!(machine.cpu().cpsr(), before.cpsr());
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn halt_with_pending_irq_returns_without_an_idle_interval() {
|
|
let (mut machine, return_pc) = call(2, false, [1, 2, 3]);
|
|
request_timer(machine.memory_mut());
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
machine.step().unwrap();
|
|
for _ in 0..100 {
|
|
if machine.cpu().pc() == return_pc {
|
|
break;
|
|
}
|
|
assert_ne!(machine.step().unwrap(), StepKind::HaltIdle);
|
|
}
|
|
assert_eq!(machine.cpu().pc(), return_pc);
|
|
}
|
|
|
|
fn request_timer(bus: &mut Memory) {
|
|
bus.write32(TIMER_BASE, 0x00c0_ffff).unwrap();
|
|
bus.advance_cycles(1);
|
|
bus.write16(TIMER_BASE + 2, 0).unwrap();
|
|
}
|
|
|
|
#[test]
|
|
fn interrupt_wait_has_no_lost_wake_between_flag_check_and_halt() {
|
|
for injection_step in 0..100 {
|
|
let (mut machine, return_pc) = call(4, false, [0, 8, 0]);
|
|
callback(machine.memory_mut());
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
for step in 0..500 {
|
|
if step == injection_step {
|
|
request_timer(machine.memory_mut());
|
|
}
|
|
if machine.cpu().pc() == return_pc {
|
|
break;
|
|
}
|
|
machine.step().unwrap();
|
|
}
|
|
assert_eq!(
|
|
machine.cpu().pc(),
|
|
return_pc,
|
|
"injection step {injection_step}"
|
|
);
|
|
assert_eq!(machine.memory().read16(IF).unwrap(), 0);
|
|
assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 0);
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn discard_old_flags_waits_for_a_new_callback_and_retains_other_flags() {
|
|
for thumb in [false, true] {
|
|
let (mut machine, return_pc) = call(4, thumb, [1, 8, 0]);
|
|
callback(machine.memory_mut());
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
machine.memory_mut().write16(IRQ_FLAGS, 9).unwrap();
|
|
for _ in 0..100 {
|
|
if machine.halted() {
|
|
break;
|
|
}
|
|
machine.step().unwrap();
|
|
}
|
|
assert!(machine.halted());
|
|
assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 1);
|
|
request_timer(machine.memory_mut());
|
|
reach(&mut machine, return_pc, 200);
|
|
assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 1);
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn unrelated_irq_does_not_complete_a_wait_for_vblank() {
|
|
let (mut machine, return_pc) = call(4, false, [1, 1, 0]);
|
|
callback(machine.memory_mut());
|
|
machine.memory_mut().write16(IE, 9).unwrap();
|
|
machine.memory_mut().write16(DISPSTAT, 8).unwrap();
|
|
machine
|
|
.memory_mut()
|
|
.write32(TIMER_BASE, 0x00c0_fc18)
|
|
.unwrap();
|
|
let mut irqs = 0;
|
|
for _ in 0..1000 {
|
|
if machine.cpu().pc() == return_pc {
|
|
break;
|
|
}
|
|
if machine.step().unwrap() == StepKind::IrqEntry {
|
|
irqs += 1;
|
|
machine.memory_mut().write16(TIMER_BASE + 2, 0).unwrap();
|
|
}
|
|
}
|
|
assert_eq!(machine.cpu().pc(), return_pc);
|
|
assert_eq!(irqs, 2);
|
|
assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 8);
|
|
assert!(machine.cycles() > u64::from(VBLANK_START));
|
|
}
|
|
|
|
#[test]
|
|
fn wait_services_restore_user_system_and_irq_masked_caller_status() {
|
|
for thumb in [false, true] {
|
|
for status in [0x10, 0x90, 0x9f, 0xdf] {
|
|
let (mut machine, return_pc) = call_status(4, thumb, [0, 8, 0], status);
|
|
callback(machine.memory_mut());
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
let before = machine.cpu().clone();
|
|
for _ in 0..100 {
|
|
if machine.halted() {
|
|
break;
|
|
}
|
|
machine.step().unwrap();
|
|
}
|
|
assert!(machine.halted());
|
|
request_timer(machine.memory_mut());
|
|
reach(&mut machine, return_pc, 200);
|
|
assert_eq!(machine.cpu().cpsr(), before.cpsr());
|
|
assert_eq!(&machine.cpu().registers()[..15], &before.registers()[..15]);
|
|
assert_eq!(machine.memory().read16(IME).unwrap(), 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn missing_or_misaligned_irq_callback_is_an_explicit_trap() {
|
|
for pointer in [0, CALLBACK + 1, CALLBACK + 2] {
|
|
let (mut machine, _) = call(5, false, [0, 0, 0]);
|
|
machine.memory_mut().write32(IRQ_HANDLER, pointer).unwrap();
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
machine.memory_mut().write16(IME, 1).unwrap();
|
|
request_timer(machine.memory_mut());
|
|
let error = (0..100).find_map(|_| machine.step().err()).unwrap();
|
|
assert!(matches!(
|
|
error,
|
|
MachineError::Cpu(CpuError::UnsupportedInstruction {
|
|
instruction: UNSUPPORTED_TRAP,
|
|
..
|
|
})
|
|
));
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn repeated_calls_restore_the_supervisor_stack() {
|
|
let mut machine = bios::boot(words(&[0xe3a0_2000, 0xef0b_0000, 0xeaff_fffd])).unwrap();
|
|
reach(&mut machine, ROM_START + 4, 100);
|
|
for _ in 0..100 {
|
|
machine.step().unwrap(); // SWI
|
|
assert_eq!(machine.cpu().registers()[13], bios::SVC_STACK);
|
|
reach(&mut machine, ROM_START + 8, 100);
|
|
assert_eq!(machine.cpu().registers()[13], SYSTEM_STACK);
|
|
machine.step().unwrap(); // Branch back to SWI.
|
|
assert_eq!(machine.cpu().pc(), ROM_START + 4);
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn arm_swi_uses_upper_comment_byte_not_low_byte() {
|
|
let mut machine = bios::boot(words(&[0xe3a0_2000, 0xef0b_ff03, 0xeaff_fffe])).unwrap();
|
|
reach(&mut machine, ROM_START + 4, 100);
|
|
finish(&mut machine, ROM_START + 8); // CpuSet(count=0), not Stop(3).
|
|
}
|
|
|
|
#[test]
|
|
fn callback_must_record_bios_flags_not_only_acknowledge_hardware_if() {
|
|
let (mut machine, return_pc) = call(4, false, [0, 8, 0]);
|
|
callback(machine.memory_mut());
|
|
machine
|
|
.memory_mut()
|
|
.write32(CALLBACK + 12, 0xe12f_ff1e)
|
|
.unwrap(); // Return after IF acknowledgement, omit flags.
|
|
machine.memory_mut().write16(IE, 8).unwrap();
|
|
request_timer(machine.memory_mut());
|
|
for _ in 0..300 {
|
|
machine.step().unwrap();
|
|
}
|
|
assert_ne!(machine.cpu().pc(), return_pc);
|
|
assert!(machine.halted());
|
|
assert_eq!(machine.memory().read16(IF).unwrap(), 0);
|
|
assert_eq!(machine.memory().read16(IRQ_FLAGS).unwrap(), 0);
|
|
}
|
|
|
|
#[test]
|
|
fn supplying_an_image_is_optional_and_does_not_change_memory_new() {
|
|
assert_eq!(
|
|
Memory::new(vec![]).unwrap().read32(0),
|
|
Err(MemoryError::Unmapped(0))
|
|
);
|
|
let mut bus = Memory::with_bios(vec![], bios::image()).unwrap();
|
|
assert_eq!(bus.write32(0, 1), Err(MemoryError::ReadOnly(0)));
|
|
assert_eq!(
|
|
bus.read8(BIOS_SIZE as u32),
|
|
Err(MemoryError::Unmapped(BIOS_SIZE as u32))
|
|
);
|
|
}
|