0xrsydn
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bb6784615a
|
feat(machine): schedule display DMA IRQs and HALT
Integrate nominal bus timing, device clocks, display events, DMA transfers, keypad state, and interrupt delivery.
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2026-10-05 12:58:38 +07:00 |
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0xrsydn
|
156f1eb839
|
feat(memory): map GBA memory and device registers
Add memory mirrors, video-bus write rules, I/O latches, timers, and interrupt registers.
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2026-10-05 12:58:38 +07:00 |
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0xrsydn
|
535c69e09f
|
feat(cpu): implement ARM7TDMI ARM and Thumb execution
Add ALU, transfers, banked status, exceptions, instruction timing, and CPU regression tests.
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2026-10-05 12:58:38 +07:00 |
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