Commit graph

13 commits

Author SHA1 Message Date
0xrsydn
7546d17630 feat(serial): support disconnected Joybus configuration and local registers 2026-10-07 06:38:04 +07:00
0xrsydn
d329c76dc3 feat(serial): retain disconnected external-clock requests 2026-10-07 03:58:21 +07:00
0xrsydn
a0516de748 fix(memory): ignore emulated writes to mapped BIOS 2026-10-07 03:33:50 +07:00
0xrsydn
8ae7b3cf72 feat(audio): implement PSG noise channel 4 2026-10-07 02:54:57 +07:00
0xrsydn
aee3621513 feat(audio): implement PSG pulse channel 2 2026-10-07 02:33:41 +07:00
0xrsydn
9a646651da feat(audio): implement PSG pulse channel 1 2026-10-07 01:58:08 +07:00
0xrsydn
5888c4d292 feat(audio): implement nominal Direct Sound playback and FIFO DMA 2026-10-07 01:40:51 +07:00
0xrsydn
d6a47a3e12 feat(bios): support sound and serial register reset 2026-10-07 01:01:07 +07:00
0xrsydn
1b39a7f33f fix(bios): initialize affine scales before cartridge boot 2026-10-06 22:35:27 +07:00
0xrsydn
efdc288db6 fix(bios): preserve documented protected-read words at firmware exits
Place skipped compatibility data at boot, SoftReset, SWI, and IRQ exit PC+8 locations. Preserve the real IRQ callback return instruction as its readback word. Keep CPU and memory behavior image-derived, including caller-supplied images.

Add original boundary, load-lane, caller-state, wait, supplied-image, and builder-fixup regressions. Document the historical failures, research decision, passing public BIOS checkpoint, and remaining fetch-history limits.

Validated on Darwin arm64: 868 workspace tests in debug and release; 799 core/demo tests separately in both profiles; 39 preparation tests; native ROM window tests in both profiles; ten graphics/window smoke modes; fmt, clippy, and rustdoc. Hash-verified public ARM, Thumb, memory, and BIOS suites pass unchanged with identical debug/release reports. BIOS: r12=0, 17606 steps, 197456 nominal cycles, one IRQ entry.
2026-10-06 00:45:28 +07:00
0xrsydn
c836944c2e feat(power): implement keypad-wake STOP and BIOS Stop service
Separate Running, Halt, and Stop states. Complete the entering instruction before freezing CPU, DMA, timers, display, and externally supplied clock advances. Wake STOP through the live enabled keypad condition without creating a clock-off IF request.

Implement original ARM SWI 0x03, preserve caller state, and expose zero-cycle StopIdle plus stopped frame-runner results. Retain DMA state, timer phase, and captured frames across sleep. Document keypad-only wake and unverified oscillator/edge timing.

Add core, BIOS, and demo regression tests; preserve BIOS-only access and failed-store isolation. Validated on Darwin arm64 with debug/release workspace and core/demo suites, Clippy, rustdoc, ten native window smoke tests, and terminal demos.
2026-10-05 18:28:23 +07:00
0xrsydn
597b02881b feat(input): implement KEYCNT keypad interrupt control
Add a dependency-free keypad state machine in gba-core, map KEYCNT, latch IF bit 12, and wake HALT through the existing interrupt gates. Sample complete CPU/DMA control writes once so transient byte values cannot create false requests.

Document the mGBA-style polling policy and its unverified hardware retrigger limits. Cover every button-state/selection pair, register masks, repeated requests, byte/word writes, failed-store isolation, DMA priority, ARM/Thumb IRQ return, BIOS IntrWait, and retained BIOS reset state.

Follow the restructured workspace and modular documentation. Validated on Darwin arm64: workspace and core/demo tests pass in debug and release, with Clippy, rustdoc, ten native window smoke tests, and terminal demos passing.
2026-10-05 18:05:26 +07:00
0xrsydn
f8a0676748 refactor: split into gameboy-rust workspace with core, demos, and desktop crates
Move the emulator into crates/gba-core, the original demo programs into
crates/gba-demos, and the minifb frontend into crates/desktop. The binary
is now gameboy-rust. Imports change from gba_rust to gba_core/gba_demos;
no behavior changes.

gba-core has no dependencies. Its integration tests use gba-demos as a
development dependency.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 16:09:46 +07:00