Commit graph

106 commits

Author SHA1 Message Date
0xrsydn
0ef2719c6b fix(video): ignore enable bits for backgrounds a mode lacks
DISPCNT enable bits for BG3 in Mode 1, BG0/BG1 in Mode 2, and every background
but BG2 in Modes 3-5 failed the whole frame with UnsupportedLayers, and the
window turned that into a stopped session. Hardware has no such backgrounds and
ignores the bits, so the renderer now masks them. The error variant is removed.

Prohibited OBJ mode 3 and shape 3 stay diagnostics: their hardware output is
not established here.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01HhfHfHEuzv2AUTd6erW1gU
2026-10-14 14:28:41 +07:00
0xrsydn
258fbff2fa fix(memory): ignore CPU and DMA writes to the Game Pak ROM windows
Stores to 0x08-0x0c returned ReadOnly and stopped the machine. Hardware ignores
them, and a second game's boot code stores to a ROM mirror. Emulated writes now
pay their bus cost and change nothing. The 0x0d window stays a diagnostic until
EEPROM is modeled there, and host writes stay strict.

Tests that used a ROM store as their failing write now cross an ignored ROM
word into the 0x0d window.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01HhfHfHEuzv2AUTd6erW1gU
2026-10-14 14:28:41 +07:00
0xrsydn
66817c919d fix(desktop): persist the save when a ROM window ends on a diagnostic
A core, DMA, rendering, window, or audio error returned before the save was
written, so every completed in-game save since launch was lost. The window now
writes changed bytes on that path too. The diagnostic stays the session error;
a refused or failed write is reported as output. A failed state restore leaves
save memory undefined and is never written. Terminal runs keep the strict rule.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01HhfHfHEuzv2AUTd6erW1gU
2026-10-14 14:28:41 +07:00
0xrsydn
fd73788735 feat(core): add whole-machine save states with F5/F9 window slots
Machine::save_state and load_state encode the CPU, every RAM, and every device
through Snapshot impls into a versioned, checksummed format. Rejected loads leave
the machine unchanged. The ROM window saves to and loads from one state file
with F5 and F9.
2026-10-14 14:28:41 +07:00
0xrsydn
be9c676476 docs(compat): record blind save-navigation negative result 2026-10-07 10:12:35 +07:00
0xrsydn
d7de5f7121 fix(video): read BG maps and tiles through the 128 KiB VRAM mirror window 2026-10-07 10:11:51 +07:00
0xrsydn
8a69e837cf docs(compat): record 40k-frame trap-point validation result 2026-10-07 09:45:42 +07:00
0xrsydn
174196cdf7 docs(compat): record Emerald visible menus and second-game failure 2026-10-07 09:37:28 +07:00
0xrsydn
7772a9d8eb fix(bios): return cleanly for empty LZ77 streams 2026-10-07 09:06:00 +07:00
0xrsydn
423d0ba120 feat(desktop): add muted accelerated ROM playback 2026-10-07 08:52:40 +07:00
0xrsydn
86f29018fd feat(desktop): add safe explicit Flash save-file persistence 2026-10-07 08:36:12 +07:00
0xrsydn
8ded9bc90e feat(cartridge): implement transactional Flash programming and erase 2026-10-07 08:36:12 +07:00
0xrsydn
2ea7164d9a feat(desktop): add opt-in Darwin audio output 2026-10-07 07:35:19 +07:00
0xrsydn
902c892d3f feat(audio): capture transactional fixed-rate stereo samples 2026-10-07 07:16:42 +07:00
0xrsydn
f496f12ea3 feat(audio): add single-bank wave channel playback 2026-10-07 06:58:46 +07:00
0xrsydn
7546d17630 feat(serial): support disconnected Joybus configuration and local registers 2026-10-07 06:38:04 +07:00
0xrsydn
8b3b7ae62d feat(cartridge): add explicit Flash identification and banked reads 2026-10-07 06:25:43 +07:00
0xrsydn
fce222eea2 feat(cartridge): implement RTC calendar transfers and clock updates 2026-10-07 05:59:29 +07:00
0xrsydn
692be36349 feat(cartridge): add explicit GPIO and RTC control support 2026-10-07 05:34:52 +07:00
0xrsydn
c5e19baed4 feat(serial): model disconnected multiplayer configuration 2026-10-07 05:06:49 +07:00
0xrsydn
0b36ef1e24 feat(serial): clock disconnected normal transfers and completion IRQs 2026-10-07 04:23:07 +07:00
0xrsydn
d329c76dc3 feat(serial): retain disconnected external-clock requests 2026-10-07 03:58:21 +07:00
0xrsydn
a0516de748 fix(memory): ignore emulated writes to mapped BIOS 2026-10-07 03:33:50 +07:00
0xrsydn
86f8663904 fix(serial): gate RCNT interrupt and Joybus controls by mode 2026-10-07 03:10:18 +07:00
0xrsydn
8ae7b3cf72 feat(audio): implement PSG noise channel 4 2026-10-07 02:54:57 +07:00
0xrsydn
ca2134f23c refactor(audio): share PSG length and envelope state 2026-10-07 02:40:09 +07:00
0xrsydn
aee3621513 feat(audio): implement PSG pulse channel 2 2026-10-07 02:33:41 +07:00
0xrsydn
9a646651da feat(audio): implement PSG pulse channel 1 2026-10-07 01:58:08 +07:00
0xrsydn
5888c4d292 feat(audio): implement nominal Direct Sound playback and FIFO DMA 2026-10-07 01:40:51 +07:00
0xrsydn
894f524cda feat(tooling): add bounded Jev game-debugging workflow 2026-10-07 01:19:19 +07:00
0xrsydn
d6a47a3e12 feat(bios): support sound and serial register reset 2026-10-07 01:01:07 +07:00
0xrsydn
cb2772cef8 feat(io): model disabled sound and disconnected serial state 2026-10-07 01:01:07 +07:00
0xrsydn
786e4d6d34 docs: correct gameplay runner status 2026-10-07 00:50:38 +07:00
0xrsydn
213a4a23af docs: select SRAM persistence as next usability requirement 2026-10-06 22:42:50 +07:00
0xrsydn
9bea613674 test(compat): pin independent Pong gameplay checks 2026-10-06 22:39:56 +07:00
0xrsydn
1b39a7f33f fix(bios): initialize affine scales before cartridge boot 2026-10-06 22:35:27 +07:00
0xrsydn
bf2ab54fc2 feat(test-runner): add deterministic gameplay scenarios 2026-10-06 22:29:47 +07:00
0xrsydn
f7c29429e3 docs: define general GBA usability milestones 2026-10-06 22:23:28 +07:00
0xrsydn
27806ccf9e fix(timers): retain shared free-running prescaler phase 2026-10-06 22:07:49 +07:00
0xrsydn
bfecc87e84 fix(timers): apply machine accesses at bus completion 2026-10-06 21:52:09 +07:00
0xrsydn
8930ea93b4 test(timing): compare prefetch cancellation with published observations 2026-10-06 21:05:30 +07:00
0xrsydn
8f22092e06 feat(timing): implement nominal Game Pak opcode prefetch 2026-10-06 20:45:16 +07:00
0xrsydn
7f3ebd3a5d refactor(cpu): account for timing in bus-access order 2026-10-06 17:17:54 +07:00
0xrsydn
86321f0071 feat(cpu): retain fetch access kinds across instruction execution 2026-10-06 16:58:17 +07:00
0xrsydn
2d7eb6e4eb feat(cpu): account for source fetches in branch and IRQ refills 2026-10-06 16:37:30 +07:00
0xrsydn
0650b60908 feat(cpu): charge non-refill code at pipeline fetch addresses 2026-10-06 15:35:10 +07:00
0xrsydn
0a696ea3e7 feat(cpu): use actual fetch regions for boundary bus snapshots 2026-10-06 15:14:34 +07:00
0xrsydn
f2c532f8f6 feat(cpu): retain IWRAM bus history across execution states 2026-10-06 14:31:14 +07:00
0xrsydn
e630d7a0ea refactor(cpu): share instruction fetch samples with bus history 2026-10-06 14:17:35 +07:00
0xrsydn
ea055270f4 feat(cpu): retain Thumb instruction pipeline halfwords 2026-10-06 04:14:56 +07:00