Commit graph

5 commits

Author SHA1 Message Date
0xrsydn
0280563430 feat(bios): expand packed units with BitUnPack
Add SWI 0x10, packed-unit widths, conditional offsets, complete word stores, and independent bit-level tests.
2026-10-05 12:58:39 +07:00
0xrsydn
5984551784 feat(bios): decode run-length streams through ARM instructions
Add RLUnCompWram and RLUnCompVram with block bounds, word-independent buffering, and device-progress tests.
2026-10-05 12:58:39 +07:00
0xrsydn
17e9351371 feat(bios): decode LZ77 streams through ARM instructions
Add byte and buffered-halfword output, overlapping references, argument diagnostics, and a reusable output routine.
2026-10-05 12:58:39 +07:00
0xrsydn
096bcfe314 feat(bios): implement division and integer square root
Add Div, DivArm, and Sqrt with emitted ARM algorithms and independent arithmetic references.
2026-10-05 12:58:39 +07:00
0xrsydn
04e4599677 feat(bios): add original boot IRQ waits and memory services
Generate original ARM firmware for minimal boot, IRQ callbacks, HALT, IntrWait, CpuSet, and CpuFastSet.
2026-10-05 12:58:39 +07:00