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feat(cpu): retain IWRAM bus history across execution states

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0xrsydn 2026-10-06 14:30:38 +07:00
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docs/research/thumb-bios-prefetch.md
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@ -63,7 +63,7 @@ Original tests in `crates/gba-core/src/cpu/thumb_bios_access_tests.rs` cover:
- Sequential history, ARM/Thumb transitions, SWI entry, and POP-to-PC exits with RAM stack data.
- Raw reads inside BIOS and protected reads outside it.
- The last complete fetch word, unavailable lookahead, and failure retention.
- Separate host reads, retained cold-IWRAM Thumb open-bus diagnostics, nominal costs, and device progression.
- Separate host reads, independent cold-IWRAM fetch history, nominal costs, and device progression.
## Validation result