refactor(cpu): share instruction fetch samples with bus history

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0xrsydn 2026-10-06 14:12:03 +07:00
commit e630d7a0ea
18 changed files with 538 additions and 117 deletions

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@ -40,7 +40,8 @@ Do not treat agreement between all emulators, or exact hardware conformance, as
## Implementation scope
`Memory::begin_cpu_access` samples before execution, using the incoming instruction state and strict mapped bytes.
`Memory::begin_cpu_access` now consumes the pipeline's new fetch sample, using the incoming instruction state.
The [shared sampler](shared-fetch-samples.md) captures strict mapped bytes before execution.
`end_cpu_access` commits BIOS history only after success. Failed instructions preserve previous history.
Thumb execution outside BIOS neither initializes nor replaces BIOS history.
Host reads remain raw inspection. CPU data loads outside BIOS select lanes from retained history as before.