0xrsydn/gameboy-rust
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refactor(audio): share PSG length and envelope state

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0xrsydn 2026-10-07 02:40:09 +07:00
commit ca2134f23c
5 changed files with 153 additions and 123 deletions
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104
crates/gba-core/src/audio/pulse.rs
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@ -1,20 +1,15 @@
//! Shared nominal pulse oscillator and modulation units. No host-clock dependency.
//! Shared nominal pulse oscillator and sweep unit. No host-clock dependency.
//! Channel 2 never receives sweep-register writes, so its sweep remains disabled.
use super::modulation::Modulation;
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]
pub(super) struct Pulse {
pub(super) modulation: Modulation,
sweep: u8,
duty: u8,
envelope: u8,
frequency: u16,
length_enabled: bool,
length: u8,
pub(super) active: bool,
phase: u8,
remaining: u32,
volume: u8,
envelope_ticks: u8,
envelope_running: bool,
sweep_shadow: u16,
sweep_ticks: u8,
sweep_running: bool,
@ -26,8 +21,8 @@ impl Pulse {
match offset {
0 => self.sweep,
2 => self.duty << 6,
3 => self.envelope,
5 => u8::from(self.length_enabled) << 6,
3 => self.modulation.envelope,
5 => u8::from(self.modulation.length_enabled) << 6,
_ => 0,
}
}
@ -36,19 +31,6 @@ impl Pulse {
16 * (2048 - u32::from(self.frequency))
}
fn dac_enabled(&self) -> bool {
self.envelope & 0xf8 != 0
}
fn envelope_can_run(&self) -> bool {
self.envelope & 7 != 0
&& if self.envelope & 8 != 0 {
self.volume < 15
} else {
self.volume > 0
}
}
fn sweep_period(&self) -> u8 {
let period = (self.sweep >> 4) & 7;
if period == 0 {
@ -72,57 +54,28 @@ impl Pulse {
match offset {
0 => {
if self.subtracted && self.sweep & 8 != 0 && value & 8 == 0 {
self.active = false;
self.modulation.active = false;
}
self.sweep = value & 0x7f;
}
2 => {
self.duty = value >> 6;
self.length = 64 - (value & 63);
}
3 => {
let was_running = self.envelope_running;
self.envelope = value;
if !self.dac_enabled() {
self.active = false;
}
self.envelope_running = self.envelope_can_run();
if !was_running && self.envelope_running {
self.envelope_ticks = value & 7;
}
self.modulation.write_length(value);
}
3 => self.modulation.write_envelope(value),
4 => self.frequency = (self.frequency & 0x700) | u16::from(value),
5 => {
self.frequency = (self.frequency & 255) | (u16::from(value & 7) << 8);
let extra_length_clock = next_step & 1 != 0;
if !self.length_enabled && value & 0x40 != 0 && extra_length_clock {
self.clock_length();
}
self.length_enabled = value & 0x40 != 0;
if value & 0x80 != 0 {
self.active = self.dac_enabled();
if self.length == 0 {
self.length = 64;
if self.length_enabled && extra_length_clock {
self.length -= 1;
}
}
if self.modulation.write_control(value, next_step) {
// Retrigger reloads the oscillator timer but preserves duty position.
// Sub-divider alignment and hardware startup latency are not modeled.
self.remaining = self.period();
self.volume = self.envelope >> 4;
self.envelope_ticks = if self.envelope & 7 == 0 {
8
} else {
self.envelope & 7
};
self.envelope_running = self.envelope_can_run();
self.sweep_shadow = self.frequency;
self.sweep_ticks = self.sweep_period();
self.sweep_running = self.sweep & 0x77 != 0;
self.subtracted = false;
if self.sweep & 7 != 0 && self.calculate_sweep() > 2047 {
self.active = false;
self.modulation.active = false;
}
}
}
@ -132,7 +85,7 @@ impl Pulse {
/// Batch oscillator edges until the next modulation event or bus access.
pub(super) fn advance(&mut self, cycles: u32) {
if !self.active || cycles == 0 {
if !self.modulation.active || cycles == 0 {
return;
}
if cycles < self.remaining {
@ -145,19 +98,8 @@ impl Pulse {
self.remaining = period - rest % period;
}
fn clock_length(&mut self) {
if self.length != 0 {
self.length -= 1;
if self.length == 0 {
self.active = false;
}
}
}
pub(super) fn clock(&mut self, step: u8) {
if step & 1 == 0 && self.length_enabled {
self.clock_length();
}
self.modulation.clock(step);
if step & 3 == 2 && self.sweep_running {
self.sweep_ticks -= 1;
if self.sweep_ticks == 0 {
@ -165,41 +107,29 @@ impl Pulse {
if self.sweep & 0x70 != 0 {
let next = self.calculate_sweep();
if next > 2047 {
self.active = false;
self.modulation.active = false;
} else if self.sweep & 7 != 0 {
self.frequency = next;
self.sweep_shadow = next;
if self.calculate_sweep() > 2047 {
self.active = false;
self.modulation.active = false;
}
}
}
}
}
if step == 7 && self.active && self.envelope_running {
self.envelope_ticks -= 1;
if self.envelope_ticks == 0 {
if self.envelope & 8 != 0 {
self.volume += 1;
} else {
self.volume -= 1;
}
self.envelope_ticks = self.envelope & 7;
self.envelope_running = self.envelope_can_run();
}
}
}
/// Signed pulse amplitude before PSG master volume and stereo routing.
pub(super) fn sample(&self) -> i16 {
if !self.active {
if !self.modulation.active {
return 0;
}
let high = [0x80u8, 0x81, 0xe1, 0x7e][usize::from(self.duty)] & (1 << self.phase) != 0;
if high {
i16::from(self.volume)
i16::from(self.modulation.volume)
} else {
-i16::from(self.volume)
-i16::from(self.modulation.volume)
}
}
}