feat(cartridge): add 512-byte and 8 KiB serial EEPROM saves
Select them with --save-type eeprom512 or eeprom8k. The part follows GBATEK's protocol on Game Pak data bit 0: DMA3 sends one bit per halfword, '11' + address + '0' requests a 64-bit block that reads back after four dummy bits, and '10' + address + data + '0' writes one. A write reports busy for a nominal 108,368 cycles before the block is stored. 8 KiB parts decode the low 10 address bits. ROMs above 16 MiB map EEPROM only at 0x0dffff00..0x0dffffff. Bits shift out only inside machine steps, so failed steps roll back. CPU stores, byte/word accesses, CPU reads during a read-out, and malformed or overlapping requests are diagnostics. Blocks are stored first-bit-as-MSB, matching common .sav layouts, and work with save files and save states. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HhfHfHEuzv2AUTd6erW1gU
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15 changed files with 828 additions and 24 deletions
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@ -383,7 +383,7 @@ fn explicit_flash_selection_runs_ram_byte_reader_and_leaves_files_unchanged() {
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fn invalid_save_type_options_fail_before_file_access() {
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for extra in [
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vec!["--save-type"],
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vec!["--save-type", "eeprom"],
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vec!["--save-type", "fram"],
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vec!["--save-type", ""],
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vec!["--save-type", "flash128", "--save-type", "flash64"],
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] {
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@ -254,3 +254,82 @@ fn sram_bytes_written_and_read_from_rom_code_persist_across_processes() {
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assert!(text(&output).contains("r6=0x0000003c"), "{}", text(&output));
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assert!(text(&output).contains("Save unchanged"));
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}
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/// One halfword per bit, MSB first, packed into ROM words.
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fn bit_halfwords(bits: &[u8]) -> Vec<u32> {
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bits.chunks(2)
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.map(|pair| u32::from(pair[0]) | pair.get(1).map_or(0, |&b| u32::from(b) << 16))
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.collect()
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}
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fn bits(value: u64, width: u32) -> Vec<u8> {
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(0..width)
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.rev()
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.map(|shift| ((value >> shift) & 1) as u8)
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.collect()
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}
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/// Run `dma` transfers (source, destination, halfword count) from ROM code, then `tail`.
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/// Halfword bitstreams live at ROM offset 0x400.
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fn eeprom_rom(dma: &[(u32, u32, u32)], tail: &[u32], data: &[u8]) -> Vec<u32> {
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let mut code = Vec::new();
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for &(source, destination, count) in dma {
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load(&mut code, 0, 0x0400_00d4); // DMA3 source register
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load(&mut code, 1, source);
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load(&mut code, 2, destination);
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load(&mut code, 3, 0x8000_0000 | count);
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code.push(0xe880_000e); // STMIA r0,{r1-r3}
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}
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code.extend(tail);
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code.push(0xeafffffe);
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code.resize(0x100, 0);
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code.extend(bit_halfwords(data));
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code
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}
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#[test]
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fn eeprom_blocks_written_and_read_through_dma3_persist_across_processes() {
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let f = Fixture::new();
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let save = f.save();
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let request = [
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vec![1, 0],
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bits(1, 6),
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bits(0x8011_2233_4455_6677, 64),
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vec![0],
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]
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.concat();
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let write = f.rom(
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"eeprom-writer.gba",
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&eeprom_rom(&[(0x0800_0400, 0x0d00_0000, 73)], &[], &request),
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);
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// Enough steps for the nominal ~108k-cycle write to finish before exit.
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let output = command(&write, &save, "eeprom512")
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.args(["--steps", "100000"])
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.output()
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.unwrap();
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assert!(output.status.success(), "{}", text(&output));
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assert!(text(&output).contains("Save persisted on clean exit"));
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let image = fs::read(&save).unwrap();
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assert_eq!(image.len(), 512);
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assert_eq!(image[8..16], 0x8011_2233_4455_6677_u64.to_be_bytes());
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assert!(image[..8].iter().chain(&image[16..]).all(|&v| v == 255));
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// Request block 1, shift out 68 bits into IWRAM, then load data bits 0 and 1.
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let request = [vec![1, 1], bits(1, 6), vec![0]].concat();
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let read = f.rom(
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"eeprom-reader.gba",
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&eeprom_rom(
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&[
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(0x0800_0400, 0x0d00_0000, 9),
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(0x0d00_0000, 0x0300_0000, 68),
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],
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&[0xe1d2_50b8, 0xe1d2_60ba], // LDRH r5,[r2,#8]; LDRH r6,[r2,#10]
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&request,
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),
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);
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let output = run(&read, &save, "eeprom512");
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assert!(output.status.success(), "{}", text(&output));
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assert!(text(&output).contains("r5=0x00000001"), "{}", text(&output));
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assert!(text(&output).contains("r6=0x00000000"), "{}", text(&output));
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assert!(text(&output).contains("Save unchanged"));
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}
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