0xrsydn/gameboy-rust
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feat(audio): implement nominal Direct Sound playback and FIFO DMA

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0xrsydn 2026-10-07 01:35:55 +07:00
commit 5888c4d292
21 changed files with 933 additions and 129 deletions
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15
crates/gba-core/src/io/timer_step.rs
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@ -1,4 +1,4 @@
//! Staged timer clocks for one machine instruction, IRQ entry, or DMA unit.
//! Staged timer and Direct Sound clocks for one instruction, IRQ entry, or DMA unit.
//! Other devices remain on the instruction-boundary scheduler.
use super::{Io, Timer, IF, TIMER_BASE};
@ -6,6 +6,7 @@ pub(super) const TIMER_IRQ_MASK: u16 = 0x78;
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub(crate) struct TimerStep {
pub(crate) audio: crate::audio::Audio,
pub(super) timers: [Timer; 4],
pub(super) phase: u16,
pub(super) pending: u16,
@ -15,6 +16,7 @@ pub(crate) struct TimerStep {
impl TimerStep {
pub(super) fn new(io: &Io) -> Self {
Self {
audio: io.audio,
timers: io.timers,
phase: io.timer_phase,
pending: io.pending & TIMER_IRQ_MASK,
@ -24,13 +26,20 @@ impl TimerStep {
pub(crate) fn advance_to(&mut self, elapsed: u32) {
assert!(elapsed >= self.elapsed, "timer step time must be monotonic");
self.pending |=
Io::advance_timer_bank(&mut self.timers, &mut self.phase, elapsed - self.elapsed);
self.pending |= Io::advance_timer_bank(
&mut self.timers,
&mut self.phase,
&mut self.audio,
elapsed - self.elapsed,
);
self.elapsed = elapsed;
}
/// All lanes of a bus access observe the same staged time.
pub(crate) fn read8(&self, address: u32, committed: u8) -> Option<u8> {
if crate::audio::Audio::mapped(address) {
return self.audio.read8(address);
}
match address {
TIMER_BASE..=0x0400_010f => {
Some(self.timers[((address - TIMER_BASE) / 4) as usize].read8(address))