feat(bios): implement division and integer square root
Add Div, DivArm, and Sqrt with emitted ARM algorithms and independent arithmetic references.
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4 changed files with 256 additions and 0 deletions
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@ -1,9 +1,11 @@
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//! Original, optional ARM BIOS replacement. No Nintendo firmware is included.
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//! Supports interrupt waits and memory copy/fill.
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//! Includes integer arithmetic services.
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//! This is a functional subset, not a complete boot ROM or a timing-compatible BIOS.
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use std::collections::BTreeMap;
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mod arithmetic;
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use crate::{
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cpu::Cpu,
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@ -110,6 +112,9 @@ pub fn image() -> Vec<u8> {
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(2, "halt"),
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(4, "intr_wait"),
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(5, "vblank_wait"),
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(6, "div"),
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(7, "div_arm"),
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(8, "sqrt"),
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(0x0b, "cpu_set"),
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(0x0c, "cpu_fast_set"),
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] {
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@ -203,6 +208,7 @@ pub fn image() -> Vec<u8> {
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["copy_halfword", "half_loop", "half_fill", "half_fill_loop"],
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);
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arithmetic::emit(&mut a);
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a.label("return");
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a.emit(0xe10f_3000); // MRS r3,CPSR
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57
src/bios/arithmetic.rs
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57
src/bios/arithmetic.rs
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@ -0,0 +1,57 @@
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//! Original integer algorithms emitted as ARM instructions, not host calculations.
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use super::ArmImage;
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pub(super) fn emit(a: &mut ArmImage) {
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a.label("div_arm");
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a.emit(0xe1a0_2000); // MOV r2,r0
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a.emit(0xe1a0_0001); // MOV r0,r1
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a.emit(0xe1a0_1002); // MOV r1,r2 (exchange input operands)
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a.label("div");
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a.emit(0xe351_0000); // CMP r1,#0
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a.branch(0, "invalid_argument"); // Diagnostic instead of firmware's divide-by-zero hang.
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a.emit(0xe92d_0070); // STMDB sp!,{r4-r6} (40 bytes total SVC stack use)
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a.emit(0xe1a0_4fc0); // MOV r4,r0,ASR #31 (numerator sign)
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a.emit(0xe020_5001); // EOR r5,r0,r1
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a.emit(0xe1a0_5fc5); // MOV r5,r5,ASR #31 (quotient sign)
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a.emit(0xe350_0000); // CMP r0,#0
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a.emit(0x4260_0000); // RSBMI r0,r0,#0 (unsigned magnitude, including INT_MIN)
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a.emit(0xe351_0000); // CMP r1,#0
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a.emit(0x4261_1000); // RSBMI r1,r1,#0
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a.emit(0xe3a0_2000); // MOV r2,#0 (quotient magnitude)
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a.emit(0xe3a0_3000); // MOV r3,#0 (remainder magnitude)
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a.emit(0xe3a0_6020); // MOV r6,#32
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a.label("div_bit");
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a.emit(0xe1b0_0080); // MOVS r0,r0,LSL #1 (next numerator bit into C)
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a.emit(0xe0a3_3003); // ADC r3,r3,r3 (remainder * 2 + bit)
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a.emit(0xe153_0001); // CMP r3,r1 (unsigned)
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a.emit(0x2043_3001); // SUBCS r3,r3,r1 (preserve comparison carry)
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a.emit(0xe0a2_2002); // ADC r2,r2,r2 (quotient * 2 + comparison carry)
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a.emit(0xe256_6001); // SUBS r6,r6,#1
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a.branch(1, "div_bit");
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// Patch only the defined outputs in the dispatcher's saved register frame.
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a.emit(0xe58d_201c); // STR r2,[sp,#28] (saved r3 = unsigned quotient magnitude)
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a.emit(0xe355_0000); // CMP r5,#0
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a.emit(0x1262_2000); // RSBNE r2,r2,#0 (signed quotient)
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a.emit(0xe354_0000); // CMP r4,#0
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a.emit(0x1263_3000); // RSBNE r3,r3,#0 (remainder follows numerator sign)
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a.emit(0xe58d_2010); // STR r2,[sp,#16] (saved r0)
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a.emit(0xe58d_3014); // STR r3,[sp,#20] (saved r1)
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a.emit(0xe8bd_0070); // LDMIA sp!,{r4-r6}
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a.branch(14, "return");
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// Restoring base-four square root: exactly 16 iterations for any u32 input.
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a.label("sqrt");
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a.emit(0xe3a0_1000); // MOV r1,#0 (root)
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a.emit(0xe3a0_2101); // MOV r2,#0x40000000 (highest power of four)
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a.label("sqrt_bit");
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a.emit(0xe081_3002); // ADD r3,r1,r2 (trial)
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a.emit(0xe150_0003); // CMP r0,r3
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a.emit(0x2040_0003); // SUBCS r0,r0,r3
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a.emit(0xe1a0_10a1); // MOV r1,r1,LSR #1 (comparison carry unchanged)
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a.emit(0x2081_1002); // ADDCS r1,r1,r2
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a.emit(0xe1b0_2122); // MOVS r2,r2,LSR #2
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a.branch(1, "sqrt_bit");
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a.emit(0xe58d_1004); // STR r1,[sp,#4] (saved r0 = floor(sqrt(input)))
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a.branch(14, "return");
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}
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@ -12,6 +12,8 @@ const DEST: u32 = 0x0201_0000;
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const CALLBACK: u32 = 0x0300_0100;
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const ROM_DATA: u32 = ROM_START + 13 * 4;
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#[path = "bios/arithmetic.rs"]
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mod arithmetic;
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fn words(code: &[u32]) -> Vec<u8> {
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code.iter().flat_map(|word| word.to_le_bytes()).collect()
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191
tests/bios/arithmetic.rs
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191
tests/bios/arithmetic.rs
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@ -0,0 +1,191 @@
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use super::*;
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use gba_rust::bios::INVALID_ARGUMENT_TRAP;
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fn divide(number: i32, denominator: i32, thumb: bool, service: u8) {
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let inputs = if service == 6 {
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[number as u32, denominator as u32]
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} else {
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[denominator as u32, number as u32]
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};
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let (mut machine, return_pc) = call(service, thumb, [inputs[0], inputs[1], 0xcafe_babe]);
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let before = machine.cpu().clone();
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finish(&mut machine, return_pc);
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// Widening avoids host overflow for INT_MIN / -1.
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let quotient = i64::from(number) / i64::from(denominator);
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let remainder = i64::from(number) % i64::from(denominator);
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assert_eq!(
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machine.cpu().registers()[0],
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quotient as u32,
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"{number}/{denominator}"
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);
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assert_eq!(machine.cpu().registers()[1], remainder as u32);
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assert_eq!(machine.cpu().registers()[3], quotient.unsigned_abs() as u32);
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assert_eq!(machine.cpu().registers()[2], before.registers()[2]);
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assert_eq!(
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&machine.cpu().registers()[4..15],
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&before.registers()[4..15]
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);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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}
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#[test]
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fn division_handles_signs_zero_numerator_and_signed_boundaries() {
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for service in [6, 7] {
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for thumb in [false, true] {
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for number in [
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i32::MIN,
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i32::MIN + 1,
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-1234,
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-17,
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-1,
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0,
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1,
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17,
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1234,
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i32::MAX,
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] {
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for denominator in [i32::MIN, -123, -10, -1, 1, 10, 123, i32::MAX] {
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divide(number, denominator, thumb, service);
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}
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}
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}
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}
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}
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#[test]
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fn division_matches_wide_integer_reference_for_seeded_inputs() {
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let mut state = 0x1a2b_3c4d_u32;
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for index in 0..1024 {
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state = state.wrapping_mul(1664525).wrapping_add(1013904223);
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let number = state as i32;
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state = state.wrapping_mul(1664525).wrapping_add(1013904223);
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let denominator = (state | 1) as i32;
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divide(
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number,
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denominator,
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index & 1 != 0,
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if index & 2 == 0 { 6 } else { 7 },
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);
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}
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}
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#[test]
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fn division_by_zero_is_a_repeatable_diagnostic_not_an_endless_loop() {
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for service in [6, 7] {
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for thumb in [false, true] {
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for number in [0, 1, u32::MAX, 0x8000_0000] {
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let operands = if service == 6 {
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[number, 0, 0]
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} else {
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[0, number, 0]
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};
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let (mut machine, _) = call(service, thumb, operands);
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let error = (0..100)
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.find_map(|_| machine.step().err())
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.expect("bounded division diagnostic");
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assert!(matches!(
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error,
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MachineError::Cpu(CpuError::UnsupportedInstruction {
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instruction: INVALID_ARGUMENT_TRAP,
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..
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})
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));
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let before = machine.cpu().clone();
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let cycles = machine.cycles();
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let timing = machine.last_timing();
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assert_eq!(machine.step(), Err(error));
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assert_eq!(machine.cpu(), &before);
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assert_eq!(machine.cycles(), cycles);
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assert_eq!(machine.last_timing(), timing);
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}
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}
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}
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}
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fn square_root(value: u32, thumb: bool) {
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let (mut machine, return_pc) = call(8, thumb, [value, 0x1234_5678, 0xabcd_ef01]);
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let before = machine.cpu().clone();
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finish(&mut machine, return_pc);
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let root = u64::from(machine.cpu().registers()[0]);
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assert!(root * root <= u64::from(value));
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assert!((root + 1) * (root + 1) > u64::from(value));
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assert!(root <= 0xffff);
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assert_eq!(
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&machine.cpu().registers()[1..15],
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&before.registers()[1..15]
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);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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}
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#[test]
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fn sqrt_handles_perfect_squares_adjacent_values_and_u32_maximum() {
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for thumb in [false, true] {
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for root in [0_u32, 1, 2, 3, 255, 256, 32767, 32768, 65534, 65535] {
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let square = root * root;
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if square != 0 {
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square_root(square - 1, thumb);
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}
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square_root(square, thumb);
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square_root(square + 1, thumb);
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}
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square_root(u32::MAX, thumb);
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}
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}
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#[test]
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fn sqrt_result_satisfies_integer_bounds_for_seeded_inputs() {
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let mut state = 0x9876_5432_u32;
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for index in 0..512 {
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state ^= state << 13;
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state ^= state >> 17;
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state ^= state << 5;
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square_root(state, index & 1 != 0);
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}
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}
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#[test]
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fn arithmetic_services_preserve_user_mode_and_interrupt_masks() {
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for service in [6, 7, 8] {
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for status in [0x10, 0x90, 0x9f, 0xdf] {
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for thumb in [false, true] {
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let (mut machine, return_pc) =
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call_status(service, thumb, [144, 12, 0x55aa], status);
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let before = machine.cpu().clone();
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finish(&mut machine, return_pc);
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assert_eq!(machine.cpu().cpsr(), before.cpsr());
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assert_eq!(machine.cpu().registers()[2], before.registers()[2]);
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assert_eq!(
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&machine.cpu().registers()[4..15],
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&before.registers()[4..15]
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);
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}
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}
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}
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}
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#[test]
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fn arithmetic_executes_real_instructions_and_keeps_device_clocks_running() {
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let (mut machine, return_pc) = call(6, false, [1234, 10, 0]);
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machine.memory_mut().write16(IE, 8).unwrap();
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machine.memory_mut().write16(IME, 1).unwrap();
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machine
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.memory_mut()
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.write32(TIMER_BASE, 0x00c0_fff0)
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.unwrap();
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let start = machine.cycles();
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let mut steps = 0;
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loop {
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assert_eq!(machine.step().unwrap(), StepKind::Instruction);
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steps += 1;
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if machine.cpu().pc() == return_pc {
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break;
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}
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assert!(steps < 1000);
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}
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assert!(steps >= 32 * 7);
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assert!(machine.cycles() > start + 16);
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assert_eq!(machine.memory().read16(IF).unwrap(), 8);
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assert_eq!(machine.cpu().registers()[0], 123);
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assert_eq!(machine.cpu().registers()[1], 4);
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assert_eq!(machine.step().unwrap(), StepKind::IrqEntry); // Delivery deferred until service return.
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}
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